Abstract | ||
---|---|---|
Power efficiency is one of the key challenges facing the HPC co-design community, sparking interest in the ARM processor architecture as a low-power high-efficiency alternative to the high-powered systems that dominate today. Recent advances in the ARM architecture, including the introduction of 64-bit support, have only fueled more interest in ARM. While ARM-based clusters have proven to be useful for data server applications, their viability for HPC applications requires an in-depth analysis of on-node and inter-node performance. To that end, as a co-design exercise, the viability of a commercially available 64-bit ARM cluster is investigated in terms of performance and energy efficiency with the widely used quantum chemistry package GAMESS. The performance and energy efficiency metrics are also compared to a conventional x86 Intel Ivy Bridge system. A 2:1 Moonshot core to Ivy Bridge core performance ratio is observed for the GAMESS calculation types considered. Doubling the number of cores to complete the execution faster on the 64-bit ARM cluster leads to better energy efficiency compared to the Ivy Bridge system; i.e., a 32-core execution of GAMESS calculation has approximately the same performance and better energy-to-solution than a 16-core execution of the same calculation on the Ivy Bridge system. |
Year | DOI | Venue |
---|---|---|
2015 | 10.1145/2834899.2834905 | Co-HPC@SC |
Field | DocType | Citations |
Electrical efficiency,x86,ARM architecture,Xeon Phi,Efficient energy use,Computer science,Ivy Bridge,Parallel computing,Database server,GAMESS,Operating system,Embedded system | Conference | 2 |
PageRank | References | Authors |
0.38 | 12 | 8 |
Name | Order | Citations | PageRank |
---|---|---|---|
Ananta Tiwari | 1 | 322 | 16.67 |
Kristopher Keipert | 2 | 2 | 1.06 |
Adam Jundt | 3 | 26 | 2.27 |
Joshua Peraza | 4 | 82 | 5.82 |
Sarom S. Leang | 5 | 2 | 0.38 |
Michael A. Laurenzano | 6 | 467 | 21.23 |
Mark S. Gordon | 7 | 283 | 25.73 |
laura carrington a | 8 | 638 | 40.62 |