Paper Info
Title
MBU-Calc: A compact model for Multi-Bit Upset (MBU) SER estimation
Abstract
Fast and accurate Soft Error Rate (SER) estimation is an important system design aspect. With the continued scaling of SRAM bit-cell dimensions and cell pitches, accurate modeling of the Multi-Bit Upset (MBU) component is becoming increasingly critical. This paper introduces MBU-Calc, a compact model for MBU SER estimation. The tool leverages Multi-Cell Upset (MCU) probabilities obtained through direct test-chip measurements. The main improvement with respect to prior published work [2] is the introduction of so-called Line Filling (LF) factors which enable more accurate projection and bucketing of silent data corruption (SDC) versus detected unrecoverable errors (DUE). The accuracy of the introduced model is demonstrated against measured MBU results.
Year
DOI
Venue
2015
10.1109/IRPS.2015.7112831
IRPS
Keywords
Field
DocType
single event upset, SEU, neutron, multi-cell upset, MCU, SBU, multi-bit upset, MBU
Soft error,Systems design,Electronic engineering,Static random-access memory,Upset,Microcontroller,Engineering,Estimation theory,Scaling,Single event upset
Conference
ISSN
Citations 
PageRank 
1541-7026
0
0.34
References 
Authors
0
2
Name
Order
Citations
PageRank
Wu Wei120414.84
Norbert Seifert220.73