Title
A Heuristic Algorithm for Deriving Compact Models of Processor Instruction Sets
Abstract
Finding a compact formal representation of a processor instruction set is important for easier comprehension by the designer, as well as for synthesis of an efficient hardware implementation of the processor's microcontroller. We present a new heuristic algorithm for deriving compact models of processor instruction sets. The algorithm is based on finding similarities between pairs of instructions and assigning similar opcodes (using a Hamming distance metric) to similar instructions (using a newly introduced instruction similarity metric). We demonstrate that this heuristic produces results with an average overhead, in terms of area, of 7.8% in comparison to the global optimum on the benchmarks we studied (subsets of instructions of ARM Cortex M0+, Texas Instruments MSP430 and Intel 8051 processors).The algorithm is implemented as an open-source plugin for the Workcraft framework and is validated on a case study of a subset of 61 (out of 68) instructions of ARM Cortex M0+ processor. We compare the presented algorithm against a number of other available implementations.
Year
DOI
Venue
2015
10.1109/ACSD.2015.17
Int. Conf. on Application of Concurrency to System Design
Keywords
Field
DocType
heuristic algorithm,compact models,processor instruction sets,compact formal representation,processor microcontroller,opcodes,Hamming distance metric,open source plugin,Workcraft framework,ARM Cortex M0+ processor
ARM architecture,Application-specific instruction-set processor,Opcode,Heuristic,Algorithm design,Heuristic (computer science),Instruction set,Computer science,Parallel computing,Theoretical computer science,Minimal instruction set computer
Conference
Citations 
PageRank 
References 
2
0.37
10
Authors
3
Name
Order
Citations
PageRank
Alessandro de Gennaro120.71
Paulius Stankaitis262.17
Andrey Mokhov313626.57