Title
A System on Reconfigurable Chip for Handwritten Digit Recognition
Abstract
The goal of this work is the design and implementation of a low-cost system-on-FPGA for handwritten digit recognition, based on a relatively deep and wide network of perceptrons. In order to increase the performance of the application on embedded processors whose performances are way below standard general purpose CPUs, a regularization method was used during the training phase of the neural network that allows for the drastic reduction of floating point operations. Our implementation can achieve a 3× speed-up toward a raw implementation without optimization, while keeping the accuracy in acceptable ranges. Our efforts reinforce the fact that FPGAs are suited for deploying complex artificial intelligence modules.
Year
DOI
Venue
2015
10.1109/FCCM.2015.44
Field-Programmable Custom Computing Machines
Field
DocType
Citations 
Computer science,Floating point,Parallel computing,Field-programmable gate array,Image processing,Chip,Time delay neural network,Regularization (mathematics),Artificial neural network,Perceptron
Conference
1
PageRank 
References 
Authors
0.37
1
2
Name
Order
Citations
PageRank
Luca Bochi Saldanha171.79
Christophe Bobda262790.57