Title
On the modeling and testing of VHDL behavioral descriptions of sequential circuits
Year
DOI
Venue
1993
10.1109/EURDAC.1993.410674
EURO-DAC
Field
DocType
Citations 
Logic synthesis,Automatic test pattern generation,Petri net,Sequential logic,Computer science,Automaton,Theoretical computer science,Finite-state machine,VHDL,Hardware description language
Conference
3
PageRank 
References 
Authors
0.45
6
3
Name
Order
Citations
PageRank
Veronique Pla130.45
Jean François Santucci27616.33
Norbert Giambiasi322737.59