Name
Abstract | ||
|---|---|---|
In this work we present a methodology to design the next generation of real-time vision processors. These processors are expected to achieve high throughput with complex applications, under real-time embedded constraints time, fault-tolerance, silicon area and power consumption. To achieve these goals, we propose the fusion of two key concepts: the Focal-Plane Image Processing FPIP and the Many-Core architectures. We show the concepts and ideas to build-up a methodology able to offer both design space exploration, and a customized programming toolchain for the final architecture. We present implementation details and results for working parts of the framework, and partial results and general comments about the work-in-progress. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1007/978-3-319-30481-6_2 | ARC |
Keywords | Field | DocType |
ASIP,Image processing,Processor architecture,Real-time | Computer science,Image processing,Real time vision,Real-time computing,Throughput,Microarchitecture,Architecture,Computer architecture,Parallel computing,Design methods,Design space exploration,Toolchain,Embedded system | Conference |
ISSN | Citations | PageRank |
0302-9743 | 1 | 0.35 |
References | Authors | |
8 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jones Yudi Mori | 1 | 20 | 4.96 |
| André Werner | 2 | 2 | 0.73 |
| Arij Shallufa | 3 | 1 | 0.35 |
| Florian Fricke | 4 | 2 | 2.08 |
| Michael Hübner | 5 | 249 | 44.10 |