Abstract | ||
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Each cell of flash memory only survives a nominally given number of write/erasure cycles. Beyond the nominal lifespan, flash memory can still record digital information but the bit error rate increases rapidly with the increment of write/erase cycles. Erasure code is a conventional method used to recover corrupted data, but its redundant data produce a large number of additional writes, making the erasure code seem to be unsuitable for the write-sensitive flash memory. We argue that, erasure code influences the lifespan of flash memory in two conflicting directions: its inherent error correction capability enables the flash memory to survive beyond the nominal lifespan, while its redundant data wear out the lifespan of flash memory by increasing the write/erase cycles. This paper builds a theoretical model to analyze both the two aspects and demonstrates that the erasure code is able to extend the nominal lifespan of flash memory by as many as 30×. |
Year | DOI | Venue |
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2015 | 10.1109/NAS.2015.7255240 | 2015 IEEE International Conference on Networking, Architecture and Storage (NAS) |
Keywords | Field | DocType |
write-erasure cycles,bit error rate,erasure code,redundant data,write-sensitive flash memory,flash memory lifespan,error correction capability,nominal lifespan | Flash memory,Computer science,Parallel computing,Real-time computing,Error detection and correction,Computer hardware,Erasure code,Erasure,Bit error rate | Conference |
Citations | PageRank | References |
0 | 0.34 | 3 |
Authors | ||
6 |
Name | Order | Citations | PageRank |
---|---|---|---|
Enqiang Zhou | 1 | 17 | 3.08 |
Yutong Lu | 2 | 307 | 53.61 |
Nong Xiao | 3 | 649 | 116.15 |
Yang Ou | 4 | 7 | 2.62 |
Zhiguang Chen | 5 | 79 | 18.83 |
Xianqiang Bao | 6 | 8 | 3.29 |