Title
A theoretical analysis of lifespan impact on flash memory imposed by erasure code
Abstract
Each cell of flash memory only survives a nominally given number of write/erasure cycles. Beyond the nominal lifespan, flash memory can still record digital information but the bit error rate increases rapidly with the increment of write/erase cycles. Erasure code is a conventional method used to recover corrupted data, but its redundant data produce a large number of additional writes, making the erasure code seem to be unsuitable for the write-sensitive flash memory. We argue that, erasure code influences the lifespan of flash memory in two conflicting directions: its inherent error correction capability enables the flash memory to survive beyond the nominal lifespan, while its redundant data wear out the lifespan of flash memory by increasing the write/erase cycles. This paper builds a theoretical model to analyze both the two aspects and demonstrates that the erasure code is able to extend the nominal lifespan of flash memory by as many as 30×.
Year
DOI
Venue
2015
10.1109/NAS.2015.7255240
2015 IEEE International Conference on Networking, Architecture and Storage (NAS)
Keywords
Field
DocType
write-erasure cycles,bit error rate,erasure code,redundant data,write-sensitive flash memory,flash memory lifespan,error correction capability,nominal lifespan
Flash memory,Computer science,Parallel computing,Real-time computing,Error detection and correction,Computer hardware,Erasure code,Erasure,Bit error rate
Conference
Citations 
PageRank 
References 
0
0.34
3
Authors
6
Name
Order
Citations
PageRank
Enqiang Zhou1173.08
Yutong Lu230753.61
Nong Xiao3649116.15
Yang Ou472.62
Zhiguang Chen57918.83
Xianqiang Bao683.29