Paper Info
Title
A 45.6-GHz matrix distributed amplifier in 0.18-nm CMOS
Abstract
This paper presents a fully integrated matrix distributed amplifier fabricated in a standard 0.18-μm CMOS process. With periodically loaded coplanar waveguides (CPW) as the synthetic transmission lines and cascode amplifiers as the gain cells, the 2×4 matrix amplifier is proposed to achieve a high gain over an extended frequency band. The fabricated circuit exhibits a gain of 6.7 dB with a 3-dB bandwidth of 45.6 GHz. Both input and output return losses are better than 10 dB within the entire frequency range. The chip size of the matrix amplifier is 1.8×1.05 mm2 including the testing pads.
Year
DOI
Venue
2005
10.1109/CICC.2005.1568622
IEEE Custom Integrated Circuits Conference
Field
DocType
ISBN
Distributed amplifier,Computer science,Frequency band,Cascode,CMOS,Electronic engineering,Input/output,Bandwidth (signal processing),Integrated circuit design,Amplifier
Conference
0-7803-9023-7
Citations 
PageRank 
References 
2
0.67
0
Authors
3
Name
Order
Citations
PageRank
Tai-Yuan Chen1131.95
Jun-Chau Chien213019.66
Liang-Hung Lu318422.12