Paper Info
Title
Simulation and validation of arbitrary ordered VSCP-PLLs using event-driven macromodeling
Abstract
In modern electronic systems, PLLs are widely used for frequency synthesis applications. PLLs have a mixed analogdigital nature, which makes difficult to characterize its overall non-linear behavior using general theory of feedback system. To simulate the transient behavior of the PLL often the circuit level simulator is used. The frequency divider circuit separates the loop in low and high frequency parts leading to a small sampling time and a high simulation time, which are major technological bottlenecks using behavioral or transistor level models. In this paper, electrical simulations of an arbitrary ordered PLL operating with a voltage switched charge pump (VSCP) are performed. By simulating each block of the VSCP-PLL within the loop using transistor level model, the results were used to setup macroscopic parameters within the Event-Driven model. The Event-Driven simulation efficiently characterizes the off-locking transient domain in a very short time. The Event-Driven simulations are validated by transistor level simulations of arbitrary ordered integer-N VSCP-PLL designed in Cadence (Virtuoso) using CMOS technologies (130nm and 65nm).
Year
DOI
Venue
2015
10.1109/ISCAS.2015.7168774
International Symposium on Circuits and Systems
Keywords
Field
DocType
Phase-locked loop, voltage switched charge-pump, event driven technique, transistor level modeling, voltage-controlled oscillator
Phase-locked loop,Frequency divider,Computer science,Semiconductor device modeling,Control theory,Voltage,CMOS,Electronic engineering,Charge pump,Transistor,Phase frequency detector
Conference
ISSN
Citations 
PageRank 
0271-4302
0
0.34
References 
Authors
3
6
Name
Order
Citations
PageRank
Ehsan Ali100.34
W. Rahajandraibe21410.25
F. Haddad379.57
Ndiogou Tall400.34
Christian Hangmann532.87
C. Hedayat622.49