Name
Title | ||
|---|---|---|
A Novel Fine Frequency Estimation Serial Architecture Applied In Satellite Communications |
Abstract | ||
|---|---|---|
This paper presents the architecture of a pilot-based Fine Frequency Estimator (FFE) based on a modified version of the Luise & Reggiannini (L&R) algorithm. The proposed architecture uses a serial correlator implementation to reduce the hardware complexity. The estimator was implemented targeting a digital receiver for the DVB-S2 standard, and with minor changes it can also support DVB-S2X receivers. Furthermore, it can be implemented in any communication system that provides pilot symbol sequences. Results show that the proposed FFE has a performance compatible with the conventional schemes, and presents a significant resources usage reduction of 78%. |
Year | Venue | Field |
|---|---|---|
2015 | 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | Architecture,Hardware complexity,Computer science,Field-programmable gate array,Communications system,Electronic engineering,Communications satellite,Digital Video Broadcasting,Estimator |
DocType | ISSN | Citations |
Conference | 0271-4302 | 0 |
PageRank | References | Authors |
0.34 | 6 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Gabriel Pereira Da Silva | 1 | 0 | 1.01 |
| Augusto F. R. Queiroz | 2 | 1 | 1.74 |
| Eduardo R. de Lima | 3 | 5 | 3.26 |
| Cesar G. Chaves | 4 | 1 | 2.41 |