Name
Abstract | ||
|---|---|---|
To reduce layout design time, analog layout designers prefer referring to legacy designs and layouts rather than starting from scratch, or thoroughly applying placement and routing tools because legacy layouts contain pretty much design expertise. Therefore, this paper presents the first knowledge-based layout synthesis methodology to generate new layouts by integrating existent design expertise contained in the quality-approved legacy layouts as much as possible. Experimental results show that the proposed methodology with knowledge mining can achieve high layout reusage rate and hence the designers' layout preference can be successfully reserved. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/ECCTD.2015.7300111 | 2015 European Conference on Circuit Theory and Design (ECCTD) |
Keywords | Field | DocType |
analog layout synthesis,knowledge mining,knowledge-based layout synthesis methodology,quality-approved legacy layouts,high layout reusage rate | Knowledge mining,Layout,Page layout,Engineering drawing,Computer science,Layout Versus Schematic,IC layout editor,Standard cell,Design layout record | Conference |
Citations | PageRank | References |
3 | 0.45 | 8 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Po-Hsun Wu | 1 | 52 | 6.05 |
| Mark Po-Hung Lin | 2 | 165 | 16.87 |
| Tsung-Yi Ho | 3 | 1061 | 95.20 |