Title
Simple and low cost technique for stacking known good dies to create compact 3D stacked parallel optics assemblies
Abstract
We demonstrate a method for stacking and connecting KGD on each other. The method requires no pre-processing of the ICs and die placement can be done using standard pick and place machines. This novel process allows creating >200um high lithographically defined interconnects and is a simple, scalable and low cost alternative to other techniques for interconnecting 3D stacked ICs.
Year
DOI
Venue
2014
10.1109/3DIC.2014.7152155
2014 International 3D Systems Integration Conference (3DIC)
Keywords
Field
DocType
optical interconnects,3D stacking
Electronic engineering,Die (manufacturing),SMT placement equipment,Materials science,Scalability,Stacking
Conference
ISSN
Citations 
PageRank 
2164-0157
0
0.34
References 
Authors
1
3
Name
Order
Citations
PageRank
o raz102.70
P. Duan200.34
H. J. S. Dorren334.66