Title
Three-dimensional integrated circuits and stacked CMOS image sensors using direct bonding of SOI layers
Abstract
We report on three-dimensionally (3D) integrated circuits and stacked CMOS image sensors by using the direct bonding of silicon-on-insulator (SOI) layers. Since the developed process allows small embedded Au electrodes by damascene process, high-density integration is possible within an image sensor pixel area of a few micrometers, beyond the limit of the conventional technique such as through silicon vias (TSVs). We confirmed a successful operation of the developed 3D integrated circuits with NFETs and PFETs bonded from separate wafers. We also demonstrated stacked CMOS image sensor with pixel-wise 3D integration, which indicates that our technology is promising for high-density integrated circuits and CMOS image sensors.
Year
DOI
Venue
2015
10.1109/3DIC.2015.7334562
2015 International 3D Systems Integration Conference (3DIC)
Keywords
Field
DocType
CMOS integrated circuits,CMOS image sensors,silicon-on-insulator (SOI),three-dimensional integration
Silicon on insulator,Wafer,Image sensor,CMOS,CMOS sensor,Copper interconnect,Electronic engineering,Direct bonding,Integrated circuit,Materials science
Conference
ISSN
Citations 
PageRank 
2164-0157
0
0.34
References 
Authors
0
9