Name
Abstract | ||
|---|---|---|
For many emerging and existing architectures, NAND flash is the storage media used to fill the cost-performance gap between DRAM and spinning disk. However, while NAND flash is the best of the available options, for many workloads its specific design choices and trade-offs are not wholly suitable. One such workload is long-running scientific applications which use checkpoint-restart for failure recovery. For these workloads, HPC data centers are deploying NAND flash as a storage acceleration tier, commonly called burst buffers, to provide high levels of write bandwidth for checkpoint storage. In this paper, we compare the costs of adding reliability to such a layer versus the benefits of not doing so. We find that, even though NAND flash is non-volatile, HPC burst buffers should not be reliable when the performance overhead of adding reliability is greater than 2%. |
Year | Venue | Field |
|---|---|---|
2015 | HotStorage | Dram,Spinning,Workload,Computer science,NAND gate,Bandwidth (signal processing),Acceleration,Volatility (finance),Operating system |
DocType | Citations | PageRank |
Conference | 2 | 0.38 |
References | Authors | |
9 | 7 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| John Bent | 1 | 95 | 9.02 |
| Brad Settlemyer | 2 | 2 | 0.72 |
| Nathan DeBardeleben | 3 | 490 | 31.71 |
| Sorin Faibish | 4 | 4 | 2.12 |
| Dennis Ting | 5 | 60 | 9.30 |
| Uday Gupta | 6 | 2 | 0.72 |
| Percy Tzelnic | 7 | 57 | 8.44 |