Name
Title | ||
|---|---|---|
An image processor for convolution and correlation of binary images implemented in FPGA |
Abstract | ||
|---|---|---|
This work presents the design and implementation of an image processor for convolution and correlation operations of black and white images using Xilinx ISE® tools. The design contains an UART module, which purpose is to allow the processor to communicate serially with other devices that use this protocol. The measures of time obtained in the processor simulation solving correlation and convolution operations, with and without the UART module are presented, and its comparison versus the time that MATLAB® takes to process the same operations with the same images. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/ICEEE.2015.7357987 | 2015 12th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE) |
Keywords | Field | DocType |
Convolution,correlation,filter window,UART | MATLAB,Convolution,Computer science,Binary image,Field-programmable gate array,Image processor,Correlation,Universal asynchronous receiver/transmitter,Computer hardware | Conference |
Citations | PageRank | References |
0 | 0.34 | 2 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Susana Ortega-Cisneros | 1 | 25 | 6.85 |
| Jorge Rivera | 2 | 78 | 9.24 |
| Pablo Moreno Villalobos | 3 | 0 | 0.34 |
| Carlos Agustin Torres C. | 4 | 0 | 1.35 |
| H. Hernandez-Hector | 5 | 0 | 0.34 |
| Juan José Raygoza-Panduro | 6 | 17 | 3.75 |