Title
High level NoC modeling using discrete event simulation
Abstract
Planning and evaluating a Network on Chip (NoC) for a specific application is usually a complex task that requires the collaboration of both hardware and software specialists. Predicting the performance of the devised architecture and solution is both difficult in nature and time consuming. In this paper we present a high level model for five-port router based NoCs using Matlab's SimEvents toolbox. The presented model is used to construct a 4 × 4 mesh NoC and evaluated the usual performance metrics like latency and throughput.
Year
DOI
Venue
2015
10.1109/IDT.2015.7396752
2015 10th International Design & Test Symposium (IDT)
Keywords
Field
DocType
NoC,Discrete Event Simulation,SimEvents,QoS
MATLAB,Latency (engineering),Computer science,Toolbox,Network on a chip,Real-time computing,Software,Throughput,Router,Discrete event simulation,Embedded system
Conference
ISSN
Citations 
PageRank 
2162-061X
0
0.34
References 
Authors
4
4
Name
Order
Citations
PageRank
Nejib Mediouni101.35
Samir Ben Abid201.69
Oussama Kallel301.69
Salem Hasnaoui415.44