Paper Info
Title
A hardware-friendly method for rate-distortion optimization of HEVC intra coding
Abstract
The next generation standard of coding, High Efficiency Video Coding (HEVC) aims to provide significantly improved compression performance in comparison with all existing video coding standards, such as MPEG-4, H.263, and H.264/AVC. The tool of rate-distortion optimization (RDO) mode decision has proven to be extremely important. Due to the increase in the number of intra prediction directions and large size of coding unit (CU), prediction unit (PU) and transform unit (TU), the number involved in RDO process rises dramatically, which is an extremely timing-and-computation-consuming process. In this paper, we propose a four-pixel-strip based ESAD and quantized TU coefficients based linear model to estimate the distortion and rate part of the RD cost function respectively. Experimental results show that the proposed RD cost function provides 85.8% area reduction and 1260% throughput improvement in hardware design, with negligible loss of bitrate and PSNR.
Year
DOI
Venue
2014
10.1109/VLSI-DAT.2014.6834898
VLSI-DAT
Keywords
Field
DocType
data compression,distortion,video coding,H.263,H.264/AVC,HEVC intra coding,MPEG-4,PSNR,RD cost function,RDO mode decision,RDO process,bitrate,coding unit,four-pixel-strip based ESAD,hardware design,hardware-friendly method,high efficiency video coding,next generation standard,prediction unit,quantized TU coefficients based linear model,rate-distortion optimization,timing-and-computation-consuming process,transform unit,video coding standards,HEVC,hardware-friendly algorithm,intra prediction,ratedistortion optimization
Coding tree unit,Linear model,% area reduction,Computer science,Coding (social sciences),Real-time computing,Throughput,Computer hardware,Distortion,Rate–distortion optimization
Conference
Citations 
PageRank 
References 
5
0.56
3
Authors
5
Name
Order
Citations
PageRank
Weiwei Shen1798.10
Yibo Fan213025.97
Leilei Huang3144.84
Jiali Li4499.29
xiaoyang zeng5136.63