Paper Info
Title
A digital pseudorandom uniform noise generator for ADC built-in self-test
Abstract
This paper presents a digital pseudorandom uniform noise generator (UNG) for a built-in self-test (BIST) solution to ADC static performance test. A 32 bits Mersenne-Twister pseudorandom uniform noise generator [1] was implemented in a FPGA and evaluated to prove its validity in a proposed ADC BIST solution [2]. A pipeline ADC and a DAC, both with a resolution of 10 bits and the BIST solution were modeled and simulated in MATLAB. The obtained results were compared with the ADC static test and the error on the maximum INL is 0.19 LSB, when the implemented UNG is used. Furthermore, the results show that an adequate statistical significance is obtained for the 10 bits ADC and this test can be done with just 1/4 of the samples if a digital UNG is used instead of a Gaussian noise generator [3]. Additionally, the number and complexity of the noise generator and the BIST circuits are quite reduced, so this input stimulus is a good on-chip solution.
Year
DOI
Venue
2015
10.1109/DTIS.2015.7127358
DTIS
Keywords
Field
DocType
digital uniform noise generator, ADC BIST, histogram test
MATLAB,Computer science,Effective number of bits,Electronic engineering,Self-shrinking generator,Noise generator,Gaussian noise,Built-in self-test,Least significant bit,Pseudorandom number generator
Conference
Citations 
PageRank 
References 
0
0.34
21
Authors
2
Name
Order
Citations
PageRank
Jose Domingos Alves100.34
G. Evans210.69