Name
Abstract | ||
|---|---|---|
A low-voltage energy-efficient SAR ADC is presented in this paper with four techniques. Arbitrary weight capacitor array tolerates errors to reduce conversion time. To operate under low voltage, DAC common mode level shift and leakage reduction sample switch with a charge pump are proposed. Differential control logic is used to save its digital power. The prototype ADC consumes 170nW at 100KS/s from a 0.35V supply. It achieves an SNDR of 56.3dB at Nyquist rate and its FOM is 3.2fJ/c.-s. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/VLSIC.2012.6243805 | VLSIC |
Field | DocType | ISBN |
Capacitor,Leakage (electronics),Computer science,Electronic engineering,CMOS,Common-mode signal,Low voltage,Successive approximation ADC,Charge pump,Electrical engineering,Nyquist rate | Conference | 978-1-4673-0845-8 |
Citations | PageRank | References |
9 | 2.92 | 2 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hung-Yen Tai | 1 | 61 | 8.18 |
| Hung-Wei Chen | 2 | 151 | 16.28 |
| Hsin-shu Chen | 3 | 93 | 16.12 |