Title | ||
---|---|---|
A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI |
Abstract | ||
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This work demonstrates a RISC-V vector microprocessor implemented in 28nm FDSOI with fully-integrated non-interleaved switched-capacitor DCDC (SC-DCDC) converters and adaptive clocking that generates four on-chip voltages between 0.5V and 1V using only 1.0V core and 1.8V IO voltage inputs. The design pushes the capabilities of dynamic voltage scaling by enabling fast transitions (20ns), simple packaging (no off-chip passives), low area overhead (16%), high conversion efficiency (80-86%), and high energy efficiency (26.2 DP GFLOPS/W) for mobile devices. |
Year | Venue | Field |
---|---|---|
2015 | Symposium on VLSI Circuits-Digest of Papers | Dynamic voltage scaling,RISC-V,System on a chip,Computer science,Voltage,Microprocessor,Converters,Electronic engineering,Switched capacitor,Vector processor |
DocType | Citations | PageRank |
Conference | 14 | 1.01 |
References | Authors | |
0 | 19 |
Name | Order | Citations | PageRank |
---|---|---|---|
Brian Zimmer | 1 | 110 | 11.58 |
Yunsup Lee | 2 | 587 | 34.70 |
Alberto Puggelli | 3 | 132 | 10.13 |
jaehwa kwak | 4 | 56 | 6.03 |
Ruzica Jevtic | 5 | 100 | 10.81 |
Keller, B. | 6 | 59 | 6.80 |
Stevo Bailey | 7 | 44 | 6.12 |
Milovan Blagojevic | 8 | 57 | 5.83 |
Pi-Feng Chiu | 9 | 49 | 6.01 |
Hanh-Phuc Le | 10 | 337 | 41.77 |
Po-Hung Chen | 11 | 65 | 11.24 |
N. Sutardja | 12 | 43 | 4.87 |
Rimas Avizienis | 13 | 244 | 22.57 |
Andrew Waterman | 14 | 915 | 47.53 |
Brian C. Richards | 15 | 72 | 37.78 |
Philippe Flatresse | 16 | 97 | 15.35 |
Elad Alon | 17 | 912 | 121.97 |
Krste Asanović | 18 | 2975 | 226.80 |
Borivoje Nikolic | 19 | 585 | 72.45 |