0.65–0.73THz quintupler with an on-chip antenna in 65-nm CMOS - Citegraph

Paper Info

Title
0.65–0.73THz quintupler with an on-chip antenna in 65-nm CMOS

Abstract
A passive frequency quintupler using a symmetric accumulation MOS varactor is demonstrated for the first time in CMOS. The broadband (0.65-0.73THz) quintupler with an on-chip antenna fabricated in a 65-nm bulk CMOS process reaches a setup limited peak Effective Isotropic Radiated Power (EIRP) of -22dBm at 726GHz, and a minimum conversion loss of 34dB. This highest order multiplier realized in CMOS has the highest EIRP among any lens-less silicon based signal generation circuit operating above 500GHz.

Year	Venue	DocType
2015	Symposium on VLSI Circuits-Digest of Papers	Conference
Citations	PageRank	References
2	0.50	0
Authors
2

Authors (2 rows)

Cited by (2 rows)

References (0 rows)

Name	Order	Citations	PageRank
Zeshan Ahmad	1	7	1.55
K. O. Kenneth	2	10	3.54

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