Title
Analysis and Modeling of Imperfections in Multi-Bit Per Stage Pipelined ADCs.
Abstract
In this paper, an approach to estimate signal to noise ratio (SNR) and effective number of bits (ENOB) in nonideal multi-bit stages of pipelined analog to digital converters (ADCs) is presented. The most significant error sources in multistage ADCs are the capacitor mismatch and the finite and imprecise gain of amplifier. Output voltage of each stage in pipelined ADC is modeled by an ideal and a nonideal output, where nonideal output is the error due to circuit imperfections in each stage. Using an appropriate model, the SNR and ENOB due to circuit nonidealities and in terms of standard deviation of random errors are calculated. Simulation results show the accuracy of the analytical proposed approach in estimation of SNR and ENOB in multi-bit per stage pipelined converters.
Year
DOI
Venue
2016
10.1142/S0218126616500791
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS
Keywords
Field
DocType
Circuit nonidealities,pipelined analog to digital converter,SNR,ENOB
Flight dynamics (spacecraft),Capacitor,Computer science,Control theory,Voltage,Signal-to-noise ratio,Electronic engineering,Converters,Effective number of bits,Standard deviation,Amplifier
Journal
Volume
Issue
ISSN
25
7
0218-1266
Citations 
PageRank 
References 
1
0.39
7
Authors
3
Name
Order
Citations
PageRank
Najmeh Rahmani110.39
Ebrahim Farshidi2186.26
Esmaeil Fatemi-Behbahani310.39