Name
Abstract | ||
|---|---|---|
Most existing solutions to pipelining nested loops are developed for general purpose processors, and may not work efficiently for field-programmable gate arrays due to loop control overhead. This is especially true when the nested loops have nonrectangular iteration spaces (IS). Thus we propose a novel method that can transform triangular IS-the most frequently found type of nonrectangular IS-into... |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1109/TVLSI.2016.2520491 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | Field | DocType |
Pipeline processing,Field programmable gate arrays,Shape,Very large scale integration,Program processors,Optimization,Logic gates | Loop control,Pipeline (computing),Logic gate,General purpose,Computer science,High-level synthesis,Parallel computing,Field-programmable gate array,Real-time computing,Electronic engineering,Very-large-scale integration,Nested loop join | Journal |
Volume | Issue | ISSN |
24 | 8 | 1063-8210 |
Citations | PageRank | References |
0 | 0.34 | 7 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hyeon Uk Sim | 1 | 31 | 5.19 |
| Atul Rahman | 2 | 18 | 1.33 |
| Jongeun Lee | 3 | 30 | 6.88 |