Paper Info
Title
A transient noise simulation model for the analysis of the optimal number of stages of the analog accumulator in TDI CMOS image sensors.
Abstract
In this paper, a fast transient noise simulation model is proposed to analyze the optimal number of stages for the maximum signal to noise ratio (SNR) of the analog accumulator in a fixed silicon area. The Transient Noise Simulation (TNS) is required to confirm the analysis of the optimal number of stages, which requires long simulation time. In order to accelerate our analysis, a fast transient noise simulation model (TNSM) is proposed based on the noise analysis and shown to be effective by TNS. Numerical analysis is verified by the TNSM, and it indicates that the optimal number of stages in a fixed area changes with the noise of the input signal.
Year
DOI
Venue
2016
10.1016/j.microrel.2016.01.008
Microelectronics Reliability
Keywords
Field
DocType
Analog accumulator,The optimal number of stages,Signal to noise ratio (SNR),Transient noise simulation model
Image sensor,Noise (electronics),Signal-to-noise ratio,Electronic engineering,Noise temperature,CMOS,Engineering,Effective input noise temperature,Transient noise,Accumulator (structured product)
Journal
Volume
ISSN
Citations 
60
0026-2714
0
PageRank 
References 
Authors
0.34
5
4
Name
Order
Citations
PageRank
Kaiming Nie1358.77
Jianxin Li272592.14
Zhiyuan Gao3179.39
Jiangtao Xu47418.98