Abstract | ||
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This letter presents a high efficiency, and small group delay variations 12-24 GHz fully-integrated CMOS power amplifier (PA) for quasi-millimeter wave applications. Maximizing the power added efficiency (PAE), and minimizing the group delay variations in a wideband frequency range are achieved by optimizing the on-chip input, output, and inter-stage matching circuits. In addition, stagger tuning is employed for realizing excellent gain flatness. A two-stage CMOS PA using the proposed methodology is designed and fabricated in 0.18 mu m CMOS technology and tested. A measured power gain (vertical bar S-21 vertical bar) of 10.5 +/- 0.7 dB and a measured small group delay variation of +/- 20 ps over the frequency range of interest are achieved. The PA shows a maximum measured PAE to be 26 % with DC power consumption of 50 mW. |
Year | DOI | Venue |
---|---|---|
2016 | 10.1587/elex.13.20160551 | IEICE ELECTRONICS EXPRESS |
Keywords | Field | DocType |
power-added efficiency (PAE), power amplifier (PA), quasi-millimeter wave band, CMOS | Computer science,CMOS,Electronic engineering,RF power amplifier,Electrical engineering,Power bandwidth,Cmos power amplifier | Journal |
Volume | Issue | ISSN |
13 | 14 | 1349-2543 |
Citations | PageRank | References |
0 | 0.34 | 2 |
Authors | ||
6 |
Name | Order | Citations | PageRank |
---|---|---|---|
Mosalam, H. | 1 | 2 | 1.73 |
Allam, A. | 2 | 2 | 7.12 |
Hongting Jia | 3 | 2 | 4.32 |
Adel Abdelrahman | 4 | 6 | 5.14 |
Takana Kaho | 5 | 11 | 5.35 |
Ramesh K. Pokharel | 6 | 18 | 14.49 |