Title
Hierarchical Verification of Quantum Circuits.
Abstract
In this paper, we introduce the idea of hierarchical verification for quantum circuits, where we use a powerful language, higher-order logic, to reason about quantum circuits formally. We propose a formal modeling and verification approach that captures quantum models built hierarchically from primitive optical quantum gates. The analysis and verification of composed circuits is done seamlessly based on dedicated mathematical foundations formalized in the HOL Light theorem prover. In order to demonstrate the effectiveness of the proposed infrastructure, we present the formal analysis of the controlled-phase gate and Shor's factoring quantum circuits.
Year
DOI
Venue
2016
10.1007/978-3-319-40648-0_26
NFM
Field
DocType
Volume
HOL,Quantum,Quantum gate,Computer science,Automated theorem proving,Quantum computer,Theoretical computer science,Quantum information,Electronic circuit,Quantum network
Conference
9690
ISSN
Citations 
PageRank 
0302-9743
1
0.35
References 
Authors
4
3
Name
Order
Citations
PageRank
Sidi Mohamed Beillahi111.03
Mohamed Yousri Mahmoud2345.73
Sofiène Tahar3915110.41