Paper Info
Title
A model-driven approach to warp/thread-block level GPU cache bypassing.
Abstract
The high amount of memory requests from massive threads may easily cause cache contention and cache-miss-related resource congestion on GPUs. This paper proposes a simple yet effective performance model to estimate the impact of cache contention and resource congestion as a function of the number of warps/thread blocks (TBs) to bypass the cache. Then we design a hardware-based dynamic warp/thread-block level GPU cache bypassing scheme, which achieves 1.68x speedup on average on a set of memory-intensive benchmarks over the baseline. Compared to prior works, our scheme achieves 21.6% performance improvement over SWL-best [29] and 11.9% over CBWT-best [4] on average.
Year
DOI
Venue
2016
10.1145/2897937.2897966
DAC
Keywords
Field
DocType
model-driven approach,warp/thread-block level GPU cache bypassing,memory requests,cache contention,cache-miss-related resource congestion,memory-intensive benchmarks
Cache-oblivious algorithm,Cache invalidation,Cache pollution,Computer science,Cache,Parallel computing,Real-time computing,Cache algorithms,Page cache,Cache coloring,Smart Cache,Embedded system
Conference
ISBN
Citations 
PageRank 
978-1-4673-8730-9
6
0.40
References 
Authors
26
6
Name
Order
Citations
PageRank
Hongwen Dai1283.14
Chao Li21326.04
Huiyang Zhou399463.26
Saurabh Gupta421811.61
Christos Kartsaklis5264.82
Mike Mantor61679.22