Abstract | ||
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The demands of faster video streaming and higher resolutions induce the next generation video coding standard, High Efficiency Video Coding (HEVC), which utilizes more complicated codec structures to obtain better video compression ratio than H.264/MPEG4. However, its computational complexity also grows significantly. The paper investigates the acceleration methods of HEVC on Graphics Processing Unit (GPU). The focused kernel is motion estimation since it is the performance bottleneck. We developed a new search pattern which incorporates GPU and CPU, and applied several performance optimization techniques on GPU. Experimental results show that our CPU/GPU implementation can achieve up-to over 17 times speedups, comparing to the state-of-art CPU implementation. For the motion estimation alone, nearly 200 times speed-up can be obtained, with slightly compression bit-rate loss. |
Year | DOI | Venue |
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2016 | 10.1109/BigMM.2016.13 | 2016 IEEE Second International Conference on Multimedia Big Data (BigMM) |
Keywords | Field | DocType |
HEVC,GPU,CUDA,Motion Vector Estimation,Performance Optimization | Block-matching algorithm,Quarter-pixel motion,Coding tree unit,Computer science,Motion compensation,Multiview Video Coding,Real-time computing,Computational science,Motion estimation,Rate–distortion optimization,Video compression picture types | Conference |
ISBN | Citations | PageRank |
978-1-5090-2180-2 | 1 | 0.39 |
References | Authors | |
11 | 5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Hao-Che Kao | 1 | 1 | 0.72 |
I.-Ching Wang | 2 | 1 | 0.39 |
Che-Rung Lee | 3 | 9 | 6.64 |
Chi-Wen Lo | 4 | 18 | 5.14 |
Hao-Ping Kang | 5 | 2 | 1.09 |