Name
Title | ||
|---|---|---|
Latency, Power, and Security Optimization in Distributed Reconfigurable Embedded Systems |
Abstract | ||
|---|---|---|
Distributed embedded systems are increasingly prevalent in numerous applications, and with pervasive network access within these systems, security is also a critical design concern. In this paper, we present a modeling and optimization framework for distributed reconfigurable embedded systems, which maps tasks on a distributed embedded system with the goal of optimizing latency, energy, and/or security across all computing and communication levels. The proposed modeling framework for dataflow applications integrates models for computational latency, security levels for inter-task and intra-task communication, communication latency, and power consumption. We evaluate the proposed methodology using a video-based object detection and tracking application. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1109/IPDPSW.2016.40 | 2016 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) |
Keywords | Field | DocType |
Distributed embedded systems,security,co-design modeling,dynamic optimization,design space exploration | Object detection,Cryptography,Latency (engineering),Computer science,Parallel computing,Field-programmable gate array,Dataflow,Critical design,Design space exploration,Access network,Distributed computing,Embedded system | Conference |
ISSN | ISBN | Citations |
2164-7062 | 978-1-5090-3683-7 | 2 |
PageRank | References | Authors |
0.36 | 17 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hyunsuk Nam | 1 | 2 | 0.70 |
| Roman Lysecky | 2 | 605 | 60.43 |