Name
Abstract | ||
|---|---|---|
Electromigration (EM) occurrence on through-silicon-vias (TSVs) is a major reliability concern for Three-Dimensional Integrated-Circuits (3D ICs), and EM can severely reduce the mean-time-to-failure (MTTF). In this work, a novel fault tolerant technique is proposed to increase the MTTF of the functional TSV network through the assignment of spare TSVs to EM-vulnerable functional TSVs. The objective is to meet the target MTTF with minimum spare TSVs and minimal impact on the circuit timing. By considering the impact of temperature variation, the proposed technique provides a more robust repair solution for EM-induced TSV defects with minimum delay overhead, compared to previous thermal-unaware methods. |
Year | Venue | Field |
|---|---|---|
2016 | PROCEEDINGS OF THE 2016 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE) | Mean time between failures,Spare part,Computer science,Fault tolerance,Electromigration,Maintenance engineering,Reliability engineering,Embedded system |
DocType | ISSN | Citations |
Conference | 1530-1591 | 4 |
PageRank | References | Authors |
0.40 | 15 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Shengcheng Wang | 1 | 13 | 4.29 |
| Mehdi B. Tahoori | 2 | 1537 | 163.44 |
| K Chakrabarty | 3 | 8173 | 636.14 |