Title
A FPGA Power Estimation Method Based on an Improved BP Neural Network
Abstract
Programmable logic device FPGA has characteristics of flexible design, high efficiency design, short development cycle and low cost. The power of FPGA is divided into static power and dynamic power. The static power is mainly decided by the temperature, it is easy to get power by building a simple model. But the dynamic power is decided by many kinds of design resources. This article focuses on XC4VSX55 FPGA chip and studies the process of its power model, especially proposes a BP neural network algorithm combines adaptive learning rate algorithm with Levenberg-Marquardt. Specific implementation is as follows, firstly, gets the sample data provided by XPower Estimator, then trains the sample data by BP neural network, and estimates the intrinsic links through the weights and thresholds of network, finally, obtains the power model. This article provides a power model, and the improved BP network algorithm not only ensures the accuracy of the training results, but also improves the convergence speed.
Year
DOI
Venue
2015
10.1109/IIH-MSP.2015.76
2015 International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP)
Keywords
Field
DocType
FPGA,BP neural network,XPower Estimator,LM algorithm
Convergence (routing),Computer science,Artificial intelligence,Artificial neural network,Computer engineering,Programmable logic device,Algorithm design,Pattern recognition,Field-programmable gate array,Dynamic demand,Train,Machine learning,Estimator
Conference
Citations 
PageRank 
References 
1
0.39
4
Authors
6
Name
Order
Citations
PageRank
Guochang Zhou110.39
Baolong Guo224432.65
Xiang Gao310.39
Jing Ma4112.04
Hongjie He523820.34
Yunyi Yan651.21