Name
Abstract | ||
|---|---|---|
This paper presents a foreground calibration method for both a sampler and a track-and-hold (T/H) buffer bandwidth mismatch in highly time-interleaved analog-to-digital converters (TI-ADCs). The T/H buffer bandwidth mismatch stems from the length difference of interconnect lines between the buffer and the channel ADC, while the sampler bandwidth mismatch arises from the mismatch in a switch and a ... |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1109/TCSI.2016.2593927 | IEEE Transactions on Circuits and Systems I: Regular Papers |
Keywords | Field | DocType |
Bandwidth,Calibration,Integrated circuit interconnections,Linearity,Capacitors,Analog-digital conversion,Switches | Dynamic range,Capacitor,Linearity,Communication channel,Converters,Electronic engineering,Spurious-free dynamic range,Bandwidth (signal processing),Mathematics,Offset (computer science) | Journal |
Volume | Issue | ISSN |
63 | 11 | 1549-8328 |
Citations | PageRank | References |
4 | 0.45 | 9 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yunsoo Park | 1 | 7 | 2.52 |
| Jin-tae Kim | 2 | 150 | 21.35 |
| Chulwoo Kim | 3 | 397 | 74.58 |