Title
A Flexible Framework for the Automatic Generation of SBST Programs.
Abstract
Software-based self-test (SBST) techniques are used to test processors and processor cores against permanent faults introduced by the manufacturing process or to perform in-field test in safety-critical applications. However, the generation of an SBST program is usually associated with high costs as it requires significant manual effort of a skilled engineer with in-depth knowledge about the processor under test. In this paper, we propose an approach for the automatic generation of SBST programs. First, we detail an automatic test pattern generation (ATPG) framework for the generation of functional test sequences. Second, we describe the extension of this framework with the concept of a validity checker module (VCM), which allows the specification of constraints with regard to the generated sequences. Third, we use the VCM to express typical constraints that exist when SBST is adopted for in-field test. In our experimental results, we evaluate the proposed approach with a microprocessor without interlocked pipeline stages (MIPS)-like microprocessor. The results show that the proposed method is the first approach able to automatically generate SBST programs for both end-of-manufacturing and in-field test whose fault efficiency is superior to those produced by state-of-the-art manual approaches.
Year
DOI
Venue
2016
10.1109/TVLSI.2016.2538800
IEEE Trans. VLSI Syst.
Keywords
Field
DocType
Program processors,Automatic test pattern generation,Model checking,Engines,Microprocessors,Built-in self-test,Manuals
Automatic test pattern generation,Model checking,Computer science,Microprocessor,Real-time computing,Software,Multi-core processor,Manufacturing process,Embedded system,Built-in self-test
Journal
Volume
Issue
ISSN
24
10
1063-8210
Citations 
PageRank 
References 
11
0.57
23
Authors
5
Name
Order
Citations
PageRank
Andreas Riefert1302.27
Riccardo Cantoro29918.20
Matthias Sauer319520.02
Matteo Sonza Reorda41250136.66
Bernd Becker585573.74