Name
Abstract | ||
|---|---|---|
As the bit-line leakage increases, the performance of SRAM will decline. Especially, the read operation will even fail when the amount of the leakage reaches a critical value. In this paper, we present a new technique, called Additive Calibration (AC), which can combat the bit-line leakage problem even in low voltage. Simulation results show that the maximum tolerant bit-line leakage current of our AC scheme is increased by 45.6% compared with the previous X-calibration scheme. Thus, this method can perform at higher frequency with much lower power consumption. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1587/elex.13.20160720 | IEICE ELECTRONICS EXPRESS |
Keywords | Field | DocType |
bit-line leakage current, additive calibration, sense amplifier, SRAM macro | Sense amplifier,Leakage (electronics),Computer science,Electronic engineering,Static random-access memory,Low voltage,Calibration | Journal |
Volume | Issue | ISSN |
13 | 18 | 1349-2543 |
Citations | PageRank | References |
1 | 0.36 | 12 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chunyu Peng | 1 | 30 | 10.29 |
| Xiangwen An | 2 | 1 | 0.36 |
| Zhiting Lin | 3 | 29 | 8.47 |
| Xiulong Wu | 4 | 17 | 5.82 |
| Wei Hong | 5 | 1 | 0.36 |