Title
Design Considerations for a 11.3 Gbit/s SiGe Bipolar Driver Array With a $5\times \text {6 V}_{\mathrm {pp}}$ Chip-to-Chip Bondwire Output to an MZM PIC
Abstract
This paper presents the design of a 5-channel driver array IC with a high total output current of 5×120 mA and a 6 Vpp differential output voltage in SiGe bipolar technology. Special attention is given to design considerations for stable electrical and thermal operation and to the minimization of cross-coupling between the array channels. The related driver array is intended to realize a low-cost,...
Year
DOI
Venue
2016
10.1109/JSSC.2016.2569075
IEEE Journal of Solid-State Circuits
Keywords
Field
DocType
Transistors,Integrated circuit modeling,Substrates,Resistors,Layout,Silicon germanium
Gigabit,Computer science,Chip,Electronic engineering
Journal
Volume
Issue
ISSN
51
9
0018-9200
Citations 
PageRank 
References 
0
0.34
0
Authors
2
Name
Order
Citations
PageRank
Horst Hettrich100.34
Michael Möller233.66