Paper Info
Title
LOCUS: low-power customizable many-core architecture for wearables.
Abstract
The requirements' demands of applications, such as real-time response, are pushing the wearable devices to leverage more power-efficient processors inside the SoC (System-on-chip). However, existing wearable devices are not well suited for such challenging applications due to poor performance, while the conventional powerful many-core architectures are not appropriate either due to the stringent power budget in this domain. We propose LOCUS - a low-power, customizable, many-core processor for next-generation wearable devices. LOCUS combines customizable processor cores with a customizable network on a message-passing architecture to deliver very competitive performance/watt - an average 3.1x compared to quad-core ARM processors used in the state-of-the-art wearable devices. A combination of full-system simulation with representative applications from wearable domain and RTL synthesis of the architecture show that 16-core LOCUS achieves an average 1.52x performance/watt improvement over a conventional 16-core shared-memory many-core architecture.
Year
DOI
Venue
2018
10.1145/3122786
ACM Trans. Embedded Comput. Syst.
Keywords
DocType
Volume
Customization, network on chip, power efficiency, wearables
Journal
17
Issue
ISSN
Citations 
1
1539-9087
4
PageRank 
References 
Authors
0.44
26
6
Name
Order
Citations
PageRank
Cheng Tan1389.50
Aditi Kulkarni240.44
Vanchinathan Venkataramani3765.85
Manupa Karunaratne4192.02
Tulika Mitra52714135.99
Li-Shiuan Peh65077398.57