Name
Title | ||
|---|---|---|
A dilated-CPU-consumption-based performance prediction for multi-core software routers |
Abstract | ||
|---|---|---|
Network function virtualization (NFV) raises new possibilities for embedding data plane processing functions, e.g., firewalls, NAT, packet forwarding, etc., on commodity hardware. However, the advantages of flexibility, scalability and low cost of commodity hardware come at a price, such as resource over-provisioning, because the performance of softwarized network functions on shared resources is hardly predictable. This paper addresses the problem of performance prediction for multi-core software routers. Specifically, the performance prediction model is developed to predict the maximum throughput a multi-core software router can perform given assigned resources. Motivated by observations, we first mathematically analyze how many CPU cycles spent for packet forwarding in multi-core processing systems. Our analytical model based on cache contention can capture its nonlinear dilation scaled by the number of CPU cores-called dilated CPU consumption (DCC). We validate the accuracy of DCC with measured data, achieving error less than 8%. We then propose two performance prediction algorithms based on the DCC. The first algorithm relies on CPU utilization statistics (called DCC-u), while its simplified version (called sDCC) does not require CPU utilization statistics. Evaluation with measured data shows that the estimations of DCC-u has error margins less than 3% for a large packet size and 10% for a small packet size, while sDCC provides larger error than DCC-u. Remarkably, our both performance prediction algorithms yield more precise estimation than that of the benchmarking techniques. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1109/NETSOFT.2016.7502413 | 2016 IEEE NetSoft Conference and Workshops (NetSoft) |
Keywords | Field | DocType |
dilated-CPU-consumption-based performance prediction,multicore software routers,network function virtualization,NFV,data plane processing functions,commodity hardware cost,softwarized network functions,performance prediction model,packet forwarding,multicore processing systems,mathematical analysis,DCC,CPU utilization statistics,small packet size,nonlinear dilation | Forwarding plane,CPU time,Computer science,Network packet,Parallel computing,Throughput,Multi-core processor,Instruction cycle,Packet forwarding,Scalability | Conference |
Citations | PageRank | References |
1 | 0.35 | 8 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Kalika Suksomboon | 1 | 26 | 5.55 |
| Masaki Fukushima | 2 | 1 | 0.35 |
| Shuichi Okamoto | 3 | 1 | 0.35 |
| Michiaki Hayashi | 4 | 79 | 13.52 |