Title
Redundancy Elimination in the ExaStencils Code Generator.
Abstract
Optimizing the performance of compute-bound codes requires, among other techniques, the elimination of redundant computations. The well-known concept of common subexpression elimination can achieve this in parts, and almost every production compiler conducts such an optimization. However, due to the conservative nature of these compilers, an external redundancy elimination can additionally increase the performance. For stencil codes using finite volume discretizations, an extension to eliminate redundancies between loop iterations is also very promising. We integrated both a classic common subexpression elimination and an extended version in the Exastencils code generator and present their impact on a real-world application.
Year
DOI
Venue
2016
10.1007/978-3-319-49956-7_13
ALGORITHMS AND ARCHITECTURES FOR PARALLEL PROCESSING, ICA3PP 2016 COLLOCATED WORKSHOPS
Keywords
Field
DocType
CSE,Common subexpression elimination,Vectorization
Common subexpression elimination,Computer science,Parallel computing,Vectorization (mathematics),Partial redundancy elimination,Stencil code,Triple modular redundancy,Compiler,Code generation,Redundancy (engineering)
Conference
Volume
ISSN
Citations 
10049
0302-9743
2
PageRank 
References 
Authors
0.37
4
3
Name
Order
Citations
PageRank
Stefan Kronawitter1192.36
Sebastian Kuckuk2355.99
Christian Lengauer31738117.05