Title
A 35fJ/Step differential successive approximation capacitive sensor readout circuit with quasi-dynamic operation.
Abstract
We propose a successive-approximation capacitive sensor readout circuit that achieves 35fJ/Step energy efficiency FoM, which represents 4x improvement over the state-of-the-art. A fully differential architecture is employed to provide robustness against common mode noise and errors. An inverter-based amplifier with near-threshold biasing provides robust, fast, and energy-efficient operation. Quasi-dynamic operation is used to maintain the energy efficiency for a scalable sample rate. A hybrid coarse-fine capacitive DAC achieves 11.7bit effective resolution in a compact area.
Year
Venue
Field
2016
Symposium on VLSI Circuits-Digest of Papers
Inverter,Efficient energy use,Computer science,Sampling (signal processing),Shaping,Capacitive sensing,Electronic engineering,Robustness (computer science),Electrical engineering,Biasing,Amplifier
DocType
Citations 
PageRank 
Conference
0
0.34
References 
Authors
0
4
Name
Order
Citations
PageRank
Hesham Omran1286.37
Abdulaziz Alhoshany200.34
Hamzah Alahmadi391.10
Khaled N. Salama434546.11