Title | ||
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Reliability Analysis of Multiple-Outputs Logic Circuits Based on Structure Function Approach. |
Abstract | ||
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Reliability is one of the principal characteristics in the design of many systems. Logic circuits are one of them. These systems are very interesting objects from the reliability point of view, because they have some characteristics that are not very common in classical approaches used in reliability engineering. First, their activity depends not only on the operability of its components (logic gates), but also on other influences, which are represented by values of the circuit input signals. Second, logic circuits are typical instances of noncoherent systems. We propose a new method of computing circuit availability (unavailability) and several measures for investigation of topological properties of a logic circuit. These measures allow us to detect components (logic gates) with the greatest influence on the circuit operability. The method is based on using the methodology of Boolean differential calculus. All the approaches presented in this paper are illustrated using the example of reliability analysis of a one-bit full adder. |
Year | DOI | Venue |
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2017 | 10.1109/TCAD.2016.2586444 | IEEE Trans. on CAD of Integrated Circuits and Systems |
Keywords | Field | DocType |
Logic circuits,Logic gates,Integrated circuit reliability,Boolean functions,Adders,Calculus | Logic synthesis,Boolean circuit,Digital electronics,Sequential logic,Pass transistor logic,Computer science,Logic optimization,Electronic engineering,Logic family,Asynchronous circuit | Journal |
Volume | Issue | ISSN |
36 | 3 | 0278-0070 |
Citations | PageRank | References |
1 | 0.37 | 9 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Miroslav Kvassay | 1 | 9 | 8.85 |
Elena N. Zaitseva | 2 | 53 | 14.38 |
Vitaly G. Levashenko | 3 | 39 | 12.90 |
Jozef Kostolny | 4 | 5 | 4.92 |