Name
Abstract | ||
|---|---|---|
A novel content addressable memory (CAM) architecture with a simple but very effective precharge controller is presented. CAM is a hardware search mechanism that precharges all its match lines (MLs) during the precharge phase, and a search is performed during the evaluate phase. With unique words stored in a CAM, all the MLs except the one, which matches with the search word have to be discharged for every search cycle. The MLs that mismatch will anyway drain the charge during the evaluation phase, here, those mismatching MLs are predicted early during the precharge phase to terminate the full precharging of such lines. This promises CAM with reduced power as well as improved search speed. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/TVLSI.2016.2576281 | IEEE Trans. VLSI Syst. |
Keywords | Field | DocType |
Computer aided manufacturing,Delays,Very large scale integration,Computer architecture,Associative memory,MOS devices | Computer-aided manufacturing,Control theory,Content-addressable memory,Match line,Computer science,Electronic engineering,Real-time computing,Computer hardware,Very-large-scale integration | Journal |
Volume | Issue | ISSN |
25 | 1 | 1063-8210 |
Citations | PageRank | References |
1 | 0.37 | 8 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Mohammed Zackriya V | 1 | 1 | 0.37 |
| Harish M. Kittur | 2 | 51 | 9.21 |