Title
Digital Buck Converter With Switching Loss Reduction Scheme for Light Load Efficiency Enhancement.
Abstract
In this brief, we present a digital pulsewidth modulation buck converter with a switching loss reduction scheme to improve conversion efficiency at light load conditions. The proposed switching loss reduction scheme combines power-stage voltage swing scaling, transistor width scaling, and controller voltage scaling to reduce the dynamic power dissipation of the system. The power-stage voltage swing scaling also reduces the inductor current ripple at light load conditions, which extends the available output current range in the continuous conduction mode (CCM). A duty ratio estimation mechanism is implemented to provide a modulated signal with the correct duty ratio to control the output voltage. Experimental results demonstrate a 38% conversion efficiency improvement at a 50- $\\mu \\text{A}$ output current. In addition, the proposed circuit achieves a 96% peak efficiency with an output current ranging from 20 $\\mu \\text{A}$ to 30 mA in the CCM operation.
Year
DOI
Venue
2017
10.1109/TVLSI.2016.2592537
IEEE Trans. VLSI Syst.
Keywords
Field
DocType
Switching loss,Transistors,Inductors,Voltage control,Power transistors,Delays,Power generation
Energy conversion efficiency,Power semiconductor device,Control theory,Duty cycle,Computer science,Voltage,Inductor,Electronic engineering,Voltage regulation,Ripple,Buck converter
Journal
Volume
Issue
ISSN
25
2
1063-8210
Citations 
PageRank 
References 
0
0.34
6
Authors
4
Name
Order
Citations
PageRank
Chung-Shiang Wu1122.04
Hui-Hsuan Lee271.94
Po-Hung Chen36511.24
Wei Hwang400.34