Title | ||
---|---|---|
Impact of resistive paths on NVM array reliability: Application to Flash & ReRAM memories. |
Abstract | ||
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In memory technology, size reduction induces consequences in terms of reliability, including an increase in the line resistances and a voltage drop along the line during memory operation. This problem can occur in Flash products during sector erase mode, and in resistive RAM (ReRAM) during forming, reset or word-reading modes. |
Year | DOI | Venue |
---|---|---|
2016 | 10.1016/j.microrel.2016.07.096 | Microelectronics Reliability |
Keywords | Field | DocType |
Line resistance,Voltage drop | Line resistance,Flash memory,Resistive touchscreen,Voltage drop,Electronic engineering,Size reduction,Engineering,Electrical engineering,Threshold voltage,Imagination,Resistive random-access memory | Journal |
Volume | ISSN | Citations |
64 | 0026-2714 | 0 |
PageRank | References | Authors |
0.34 | 0 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Pierre Canet | 1 | 0 | 0.34 |
Jérémy Postel-Pellerin | 2 | 2 | 2.74 |
Hassen Aziza | 3 | 55 | 17.38 |