Name
Title | ||
|---|---|---|
Beyond the Roofline: Cache-Aware Power and Energy-Efficiency Modeling for Multi-Cores. |
Abstract | ||
|---|---|---|
To foster the energy-efficiency in current and future multi-core processors, the benefits and trade-offs of a large set of optimization solutions must be evaluated. For this purpose, it is often crucial to consider how key micro-architecture aspects, such as accessing different memory levels and functional units, affect the attainable power and energy consumption. To ease this process, we propose a set of insightful cache-aware models to characterize the upper-bounds for power, energy and energy-efficiency of modern multi-cores in three different domains of the processor chip: cores, uncore and package. The practical importance of the proposed models is illustrated when optimizing matrix multiplication and deriving a set of power envelopes and energy-efficiency ranges of the micro-architecture for different operating frequencies. The proposed models are experimentally validated on a computing platform with a quad-core Intel 3770K processor by using hardware counters, on-chip power monitoring facilities and assembly micro-benchmarks. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/TC.2016.2582151 | IEEE Trans. Computers |
Keywords | Field | DocType |
Computational modeling,Bandwidth,Computer architecture,Random access memory,Optimization,Hardware,Radiation detectors | Cache,Computer science,Modeling and simulation,Efficient energy use,Parallel computing,Uncore,Real-time computing,Chip,Bandwidth (signal processing),Energy consumption,Matrix multiplication,Embedded system | Journal |
Volume | Issue | ISSN |
66 | 1 | 0018-9340 |
Citations | PageRank | References |
1 | 0.36 | 19 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Aleksandar Ilic | 1 | 283 | 35.40 |
| Frederico Pratas | 2 | 119 | 15.69 |
| Leonel Sousa | 3 | 1210 | 145.50 |