Title
A clock synchronization method for EtherCAT master.
Abstract
EtherCAT has been widely applied in the motion control domain due to its advantages of the fast response speed, low CPU usage and good synchronization performance. Although the built-in distributed clock (DC) synchronization mechanism exhibits strong performance between slaves, the method of clock synchronization between the master and the reference clock is left open for selection by users and there are very few studies in this area. This paper introduces three synchronization modes for EtherCAT and analyzes the reasons for packet loss in free run mode and DC mode. This paper presents a novel method to realize the master clock synchronization with the reference clock. The proposed method can eliminate the settling time which is unusual in other synchronization mechanisms. The method is implemented on Windows with real-time extension and experimental results prove its feasibility.
Year
DOI
Venue
2016
10.1016/j.micpro.2016.03.002
Microprocessors and Microsystems
Keywords
Field
DocType
EtherCAT,Clock synchronization,Packet loss
Master clock,Clock drift,Computer science,Clock domain crossing,Real-time computing,Clock synchronization,Digital clock manager,Frame synchronization (video),Synchronization (computer science),Self-clocking signal
Journal
Volume
Issue
ISSN
46
PB
0141-9331
Citations 
PageRank 
References 
0
0.34
0
Authors
4
Name
Order
Citations
PageRank
Xin Chen140.85
Di Li230516.43
Jiafu Wan31866100.02
Nan Zhou400.34