Title
URFA-Update based register file architecture with partial register write for energy efficiency.
Abstract
In modern architectures the register file is one of the most energy consuming and frequently used components of the processor. Therefore, reducing the register file power dissipation is critical. In this paper, we propose schemes that reduce the energy dissipation of the register file by not writing the bits that are not changed. Our schemes rely on the observation that on the average only 10% of the register bits are changed by the instructions. In this study, we propose a combination of architectural and circuit level techniques that exploit this inefficiency for the register file's write power reduction using an update-based scheme. We show that for a 64-bit datapath it is possible to reduce the energy dissipation of the register file up to 25% for individual benchmark programs and by 21% on the average across all simulated benchmarks with a negligible performance compromise.
Year
DOI
Venue
2016
10.1016/j.micpro.2016.07.019
Microprocessors and Microsystems - Embedded Hardware Design
Keywords
Field
DocType
Low-power design,Register file,Microprocessors,SRAM
Status register,Computer science,Memory data register,Parallel computing,Control register,Stack register,Register file,Register window,Register renaming,Computer hardware,Processor register
Journal
Volume
Issue
ISSN
47
PB
0141-9331
Citations 
PageRank 
References 
0
0.34
0
Authors
3
Name
Order
Citations
PageRank
Eker, A.141.44
Yakup Murat Mert200.34
Oguz Ergin342425.84