Paper Info
Title
Software Controlled Clock Modulation for Energy Efficiency Optimization on Intel Processors.
Abstract
Current Intel processors implement a variety of power saving features like frequency scaling and idle states. These mechanisms limit the power draw and thereby decrease the thermal dissipation of the processors. However, they also have an impact on the achievable performance. The various mechanisms significantly differ regarding the amount of power savings, the latency of mode changes, and the associated overhead. In this paper, we describe and closely examine the so-called software controlled clock modulation mechanism for different processor generations. We present results that imply that the available documentation is not always correct and describe when this feature can be used to improve energy efficiency. We additionally compare it against the more popular feature of dynamic voltage and frequency scaling and develop a model to decide which feature should be used to optimize inter-process synchronizations on Intel Haswell-EP processors.
Year
DOI
Venue
2016
10.1109/E2SC.2016.15
E2SC@SC
Keywords
Field
DocType
Microprocessors, Performance analysis, Systems modeling, Dynamic voltage scaling
Dynamic voltage scaling,Efficient energy use,Computer science,Parallel computing,Voltage,Modulation,Real-time computing,Software,Frequency scaling,Systems modeling,Frequency modulation,Embedded system
Conference
ISBN
Citations 
PageRank 
978-1-5090-3856-5
0
0.34
References 
Authors
5
5
Name
Order
Citations
PageRank
Robert Schöne123519.27
Thomas Ilsche217214.92
Mario Bielert321.41
Daniel Molka434019.39
Daniel Hackenberg540028.07