Abstract | ||
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Over the past few years, utilizations of wireless sensor networks (WSNs) have employed nodes based on microcontrollers. Reducing power consumption requires the development of System on-Chip (SoC) implementations that provide both energy efficiency and adequate performance. In this paper, we propose an architecture of SoC based on ARM processor in low power consumption. The proposed architecture is based on interfacing hardware accelerators with software applications for routing protocol. We mapped each peripheral of the proposed architecture to the Nexys4 platform and we executed experimental tests to evaluate the system performance. The measurements demonstrate that the proposed architecture reduce the energy consumption by more than 60%, saves up to 40% of the execution time and does not consume many resources. |
Year | DOI | Venue |
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2016 | 10.1109/IDT.2016.7843063 | 2016 11th International Design & Test Symposium (IDT) |
Keywords | Field | DocType |
Architecture,Accelerator,Low power,Routing,SoC,WSNs | ARM architecture,Wireless,Computer science,Efficient energy use,Interfacing,Real-time computing,Microcontroller,Wireless sensor network,Energy consumption,Routing protocol,Embedded system | Conference |
ISSN | ISBN | Citations |
2162-061X | 978-1-5090-4901-1 | 0 |
PageRank | References | Authors |
0.34 | 4 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Manel Elleuchi | 1 | 0 | 0.34 |
Mariem Triki | 2 | 0 | 0.34 |
Abdulfattah Mohammad Obeid | 3 | 22 | 4.64 |
Abid Mohamed | 4 | 39 | 19.08 |