Name
Abstract | ||
|---|---|---|
With the development of modern semiconductor fabrication technology, the channel length of the CMOS device and the device pitch continually shrink accompanied by more and more severe process variation and signal coupling effect, respectively. In this paper, we explain how the coupling effect interferes with the action of the sense amplifier (SA); then we introduce a coupling suppressed SA. In our design, we adjust the time control. The coupled signals are classified and suppressed by different turn on currents. The new architecture can achieve obvious improvement under differential input in our Monte Carlo simulation. The area and speed cost can be omitted. Through our work, we recommend our design of SA and draw attention to the coupling effect for other circuits. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/TVLSI.2017.2649886 | IEEE Trans. VLSI Syst. |
Keywords | Field | DocType |
Couplings,Logic gates,Capacitance,Random access memory,Delays,Very large scale integration,Latches | Sense amplifier,Logic gate,Coupling,Computer science,Semiconductor device fabrication,Static random-access memory,CMOS,Real-time computing,Electronic engineering,Process variation,Electronic circuit,Electrical engineering | Journal |
Volume | Issue | ISSN |
25 | 5 | 1063-8210 |
Citations | PageRank | References |
2 | 0.41 | 6 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yiping Zhang | 1 | 2 | 1.09 |
| Ziou Wang | 2 | 91 | 9.82 |
| Canyan Zhu | 3 | 12 | 3.97 |
| Lijun Zhang | 4 | 2 | 0.41 |