Name
Title | ||
|---|---|---|
GPU Implementation of Bitplane Coding with Parallel Coefficient Processing for High Performance Image Compression. |
Abstract | ||
|---|---|---|
The fast compression of images is a requisite in many applications like TV production, teleconferencing, or digital cinema. Many of the algorithms employed in current image compression standards are inherently sequential. High performance implementations of such algorithms often require specialized hardware like field integrated gate arrays. Graphics Processing Units (GPUs) do not commonly achieve... |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/TPDS.2017.2657506 | IEEE Transactions on Parallel and Distributed Systems |
Keywords | Field | DocType |
Image coding,Encoding,Graphics processing units,Transform coding,Instruction sets,Codecs,Computer architecture | Instruction set,Computer science,Parallel computing,Transform coding,Real-time computer graphics,General-purpose computing on graphics processing units,Codec,Image compression,Context-adaptive binary arithmetic coding,Encoding (memory) | Journal |
Volume | Issue | ISSN |
28 | 8 | 1045-9219 |
Citations | PageRank | References |
1 | 0.38 | 13 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Pablo Enfedaque | 1 | 8 | 1.60 |
| Francesc Auli-Llinas | 2 | 42 | 10.68 |
| Juan Carlos Moure | 3 | 82 | 13.31 |